Field programmable gate arrays (FPGA) are commonly used in many applications that require complex logic functions. In general, FPGAs are comprised of logic heads (also referred to as cells) arranged in a repeating manner and interconnect structures that route signals between the various cells. There are many different types of FPGA architectures that are commercially available from vendors such as Xilinx, Altera, Actel, Lattice Semiconductor, QuickLogic, and others.
In any FPGA architecture, there are design tradeoffs between some basic considerations. For example, the complexity of the cell and the placement and routing of the interconnect structures between the cells are important. A highly complex logic cell, for example, a look-up table based coarse grain, may be able to perform a large number of sophisticated operations. However, if a relatively simple operation, such as that of a NAND gate is required by the FPGA user, much of the functionality and occupied space of the logic cell is wasted.
On the other hand, a logic cell that consists of simple multiplexers and basic logic gates would require the use of a relatively high amount of valuable wiring resources (and silicon real estate) to achieve complex functionality. Thus, in any FPGA architecture, balance must be reached between functionality and flexibility. Furthermore, the ease of use of the routing of the interconnect resources, operating speed, and power dissipation of the configured FPGA are other considerations.